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SK10/100E116
HIGH-PER.ORMANCE PRODUCTS Description
The SK10/100E116 is a quint differential line receiver designed for use in new, high-performance ECL systems. The receiver design features clamp circuitry to cause a defined output state if both the inverting and non-inverting inputs are left open; in this case the Q output goes low, while the Q* output goes high. This feature makes the device ideal for twisted pair applications. If both inverting and non-inverting inputs are at an equal potential of >-2.9V, the receiver does not go to a defined state, but rather shares current in normal differential amplifier fashion, producing output voltage levels midway between high and low. This may even cause the device to oscillate. The SK10/100E116 provides VBB output for either singleended use or as a DC bias for AC coupling to the device. The VBB output pin should be used only as a DC bias for the E116 as its current sink/source capability is limited. Whenever used, the VBB pin should be bypassed to VCC via a 0.01 F capacitor.
Quint Differential Line Receiver
.eatures
* * * * * * * * 500 ps Maximum Propagation Delay Extended VEE Range of -4.2V to -5.5V VBB Output for Single-Ended Reception Internal 75K Input Pull-Down Resistors ESD Protection of >4000V Fully Compatible with MC10E/100E116 Specified Over Industrial Temperature Range: -40oC to +85oC Available in 28-Pin PLCC Package
PIN Description
Pin D0, D0*D4, D4* Q0, Q0*-Q4, Q4* VBB VCC0 .unction Differential Input Pairs Differential Output Pairs Reference Voltage Output VCC to Output
.unctional Block Diagram
D0 D0* D1 D1* D2 D2* D3 D3* D4 D4* VBB Q0 Q0*
VCC0 VCC0 19
D4*
Q4* 21
D3
D4
Q1 Q1*
D3* 26 27 28 1 2 3 4
25
20
24
23
22
Q4
18 17 16 PLCC TOPVIEW 15 14 13 12
10 11 5 6 7 8 9
Q3* Q3 VCC Q2* Q2 VCC0 Q1*
Q2 Q2* Q3 Q3* Q4
D2 D2* VEE VBB D0 D0*
D1
VCC0
Q0
VCC0
D1*
Q0*
Q1
Q4*
Revision 1 /.ebruary 21, 2001
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SK10/100E116
HIGH-PER.ORMANCE PRODUCTS Package Information
28-Pin PLCC Package
Y BRK -N-
A Z
D
0.007 (0.180) M T L - M 0.007 (0.180)
M
S S
NS NS
PIN Descriptions
-L- -M-
R
T L-M
C
+ +
E G J G1 0.004 (0.100) -T- SEATING PLANE VIEW S
W
D
0.010 (0.250) S T L - M S N S
V 28 1
H
B 0.007 (0.180) U
M
0.007(0.180) M T L - M S N S
T
L-M
M
S
N
S
0.007 (0.180) +
T
L-M
S
N
S
Z
K1
K
+ X G1 0.010 (0.250) S T L-M
S
N
S
F
0.007 (0.180) M T L - M
S
N
S
NOTES: 1. Datums -L-, -M-, and -N- determined where top of lead shoulder exits plastic body at mold parting line. 2. DIM G1, true position to be measured at Datum -T-, Seating Plane. 3. DIM R and U do not include mold flash. Allowable mold flash is 0.010 (0.250) per side. 4. Dimensioning and tolerancing per ANSI Y14.5M, 1982. 5. Controlling Dimension: Inch. 6. The package top may be smaller than the package bottom by up to 0.012 (0.300). Dimensions R and U are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. Dimension H does not include Dambar protrusion or intrusion. The Dambar protrusion(s) shall not cause the H dimension to be greater than 0.037 (0.940). The Dambar intrusion(s) shall not cause the H dimension to be smaller than 0.025 (0.635).
INCHES
DIM A B C E . G H J K R U V W X Y Z G1 K1 MIN 0.485 0.485 0.165 0.090 0.013 MAX 0.495 0.495 0.180 0.110 0.019
MILLIMETERS
MIN 12.32 12.32 4.20 2.29 0.33 MAX 12.57 12.57 4.57 2.79 0.48
0.050 BSC 0.026 0.020 0.025 0.450 0.450 0.042 0.042 0.042 -2o 0.410 0.040 0.032 --0.456 0.456 0.048 0.048 0.056 0.020 10o 0.430 --
1.27 BSC 0.66 0.51 0.64 11.43 11.43 1.07 1.07 1.07 -2o 10.42 1.02 0.81 --11.58 11.58 1.21 1.21 1.42 0.50 10o 10.92 --
Revision 1 /.ebruary 21, 2001
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SK10/100E116
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
SK10/100E116 DC Electrical Characteristics (Notes 1, 2)
(VCC - VEE = 4.2V to 5.5V; VOUT loaded 50 to VCC- 2.0V)
TA = -40oC
Symbol VBB IIN I EE V CC V EE Ch a r a c t e r i s t i c Out put Ref er enc e Vol t ag e9 10E 100E I nput Cur r ent Power Supply Cur rent 10EL 100EL Power Supply Voltage 4. 2 Min 1. 43 1. 38 - 200 Typ Max Min
TA = 0oC
Typ Max
TA = +25oC
Min Typ Max Min
TA = +85oC
Typ Max 1. 19 1. 26 200 35 40 4. 2 5. 5 Un i t V V A mA mA V
1. 30 1. 38 1. 26 1. 38 200 35 35 5. 5 4. 2 - 200
1. 27 1. 35 1. 26 1. 38 200 35 35 5. 5 4. 2 - 200
1. 25 1. 31 1. 26 1. 38 200 35 35 5. 5 - 200
AC Characteristics
SK10/100EL116 AC Electrical Characteristics
(VCC - VEE = +4.2V to +5.5V ; VOUT loaded 50 to VCC - 2.0V)
TA = -40oC
Symbol t PLH t P HL tskew tskew VPP tr , tf V C MR Ch a r a c t e r i s t i c Propagation Delay to Output D Within-Device Skew6 DN t o Qn , Qn * Duty Cycle Skew7 t P L H t P HL Mi n i mu m I n p u t S w i n g C L K 3 Output Rise/.all Times ( 2 0 % t o 8 0 %) C o mmo n Mo d e R a n g e 4 150 190 VCC 2. 0 Min 365 50 10 1000 580 VCC 0. 6 150 210 VCC 2. 0 Typ Max 445 Min 385
TA = 0oC
Typ Max 505 50 10 1000 580 VCC 0. 6 150 210 Min 310
TA = +25oC
Typ Max 530 50 10 1000 580 VCC 0. 6 150 210 VCC 2. 0 Min 315
TA = +85oC
Typ Max 495 50 10 1000 580 VCC 0. 6 Un i t ps ps ps mV ps V
VCC 2. 0
Revision 1 /.ebruary 21, 2001
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SK10/100E116
HIGH-PER.ORMANCE PRODUCTS AC Characteristics (continued)
Notes: 1. 10EL circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. Outputs are terminated through a 50 resistor to VCC-2.0V. 2. 100K circuits are designed to meet the DC specification shown in the table where transverse airflow greater than 500 lfpm is maintained. 3. Minimum input swing for which AC parameters guaranteed. 4. CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the high level falls within the specified range and the peak-to-peak voltage lies between VPP(min) and 1V. The lower end of the CMR range varies 1:1 with VCC and is equal to VCC - 2.0V. 5. Voltages referenced to VCC = 0V (ECL mode). 6. Within device skew is defined as indentical transition on similar path through a device. 7. Duty cycle is defined only for differential operation when the delays are measured from the crosspoint of the inputs to the crosspoints of the outputs. 8. For standard ECL DC Specifications, refer to the ECL Logic Family Standard DC Specifications Data Sheet. 9. Voltages are referenced to VCC = 0V (ECL Mode). 10. For part ordering description, see HPP Part Ordering Information Date Sheet.
Ordering Information
Ordering Code SK10E 116P J SK10E 116P J T SK100E 116P J SK100E 116P J T Package ID 28- P L CC 28- P L CC 28- P L CC 28- P L CC Temperature Range I ndus t r i al I ndus t r i al I ndus t r i al I ndus t r i al
Contact Information
Division Headquarters 10021 Willow Creek Road San Diego, CA 92131 Phone: (858) 695-1808 FAX: (858) 695-2633
Semtech Corporation High-Performance Products Division
Marketing Group 1111 Comstock Street Santa Clara, CA 95054 Phone: (408) 566-8776 FAX: (408) 727-8994
Revision 1 /.ebruary 21, 2001
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